1. Field of the Invention
The present invention generally relates to a semiconductor device, and more particularly, to an electrostatic discharge protection circuit that protects an internal circuitry from an electrostatic discharge damage. The present invention also relates to a method of fabricating the semiconductor device.
This application relies for priority on Japanese patent application, Serial Number 228642/1999, filed Aug. 12, 1999, which is incorporated herein by reference in its entirety.
2. Description of the Related Art
An electrostatic discharge occurs in various steps such as an assembly step, a wafer processing step or a carrying step of an IC (Integrated Circuit) chip.
As an integration of the IC has been enhanced, the size of elements formed on the IC have been small in recent years. As a result, an amount of a withstanding voltage of the IC against the electrostatic discharge decreases.
In conventional IC, ESD (Electro-Static Discharge) protection circuits, which prevent an internal circuitry from breaking due to a surge voltage input from connection terminals, are provided at respective connection terminals connected to the internal circuitry.
However, since the conventional IC has the ESD protection circuits each of which is connected to corresponding connection terminal, a circuit area per one connection terminal increases. That is, a relatively large circuit area for the ESD protection circuit is needed. Therefore, the conventional IC is not suitable for a higher integration.
Consequently, there has been a need for an improved semiconductor device and method of fabricating the same.
It is an object of the present invention is to provide a semiconductor device having a smaller size.
It is another object of the present invention to provide a semiconductor device which includes a protection circuit having a smaller size.
According to an aspect of the present invention, for achieving one or more of the above objects, there is provided a semiconductor device that includes a semiconductor substrate and an internal circuitry which is formed on the semiconductor substrate and which executes a predetermined operation. The device also includes a terminal which is connected to the internal circuitry and which receives an external signal and a protection circuitry which is formed on the semiconductor substrate. The protection circuitry includes a transistor having a first region of a first conductivity type, a second region of the first conductivity type and a third region of a second conductivity type. The first region is connected to the terminal. The second region is provided at a scribe line of the semiconductor substrate. The third region is defined by a region between the first region and the second region.
The above and further objects and novel features of the invention will more fully appear from the following detailed description, appended claims, and accompanying drawings.